1. Field of the Invention
The present invention relates to disk drives. In particular, the present invention relates to a disk drive using a timer to arbitrate periodic serial communication with a power driver.
2. Description of the Prior Art
FIG. 1 shows a prior art disk drive comprising a disk 2 having a plurality of concentric tracks 4 and a plurality of embedded servo sectors 60–6N. The embedded servo sectors 60–6N comprise positioning information, including a track address and servo bursts, for positioning a head 8 over a target track during write and read operations. The head 8 is connected to a distal end of an actuator arm 10 which is rotated about a pivot by a voice coil motor (VCM) 12 in order to actuate the head 8 radially over the disk 2.
As the head 8 passes over each servo sector 6i the read signal emanating from the head 8 is demodulated by a read channel circuit (not shown). The demodulated servo information is processed by a microprocessor 14 to generate a position error signal (PES) representing a position error between the head's 8 actual position and target position. The microprocessor 14 executes a servo algorithm (e.g., a servo compensator) for generating a position error control signal (PECS) 16 used to generate a VCM control signal 18 for controlling actuation of the VCM 12. A notch filter 20 filters the PECS 16 to attenuate certain frequencies that would otherwise excite resonances in the VCM 12 and actuator arm 10 assembly.
The analog circuitry for generating the VCM control signal 18 is typically integrated into a power driver chip 22 separate from a system-on-a-chip (SOC) comprising the microprocessor 14 and notch filter 20. In order to reduce the pin count and associated cost of the power driver chip 22, a serial communication circuit 24 is use for communication between the SOC and the power driver chip 22. An arbitration algorithm is implemented to arbitrate between the periodic output 26 of the notch filter 20 and other serial communications between the microprocessor 14 and power driver chip 22. Because the performance of the notch filter 20 degrades if jitter is induced in the periodic interval 25 for transmitting the output 26 to the power driver 22, the microprocessor 14 implements a hold-off of the serial communication circuit 24 to prevent other transmissions from interfering with the notch filter 20 transmission.
FIG. 2 illustrates the steps of a prior art arbitration algorithm which may be implemented in hardware (e.g., as part of the serial communication circuit 24) or implemented in firmware executed by the microprocessor 14. When a servo sector 6i is encountered at step 28, at step 30 the embedded servo information is demodulated and a PECS computed by the microprocessor 14. At step 32 the microprocessor 14 inputs the PECS into the notch filter 20, and at step 34 a hold-off of other serial transmissions is initiated while the notch filter 20 computes the next output 26. When the hold-off interval expires at step 36, the output 26 of the notch filter 20 is transmitted immediately to the power driver 22 at step 38, and at step 40 other serial transmissions are enabled. Since the hold-off interval is typically longer than the computation time of the notch filter 20, the transmission of the notch filter's output 26 is delayed until the end of the hold-off interval. However, this delay does not significantly degrade operation of the notch filter 20 since it does not change (jitter) the periodic interval 25 for transmitting the notch filter's 20 output 26.
Other control components of the disk drive may require a substantially constant transmission interval to operate optimally. For example, the power driver 22 may comprise an analog-to-digital (A/D) converter for sampling various feedback signals, such as the current in the VCM coil 12, which may need to be transmitted to the microprocessor 14 at a substantially constant periodic interval in order to improve the performance of the VCM control algorithm. The disk drive may also comprises a vibration sensor for sensing external disturbances by generating a voltage proportional to vibration acceleration. The output of the vibration sensor is sampled by the analog-to-digital (A/D) converter within the power driver 22 to generate a sampled signal that is transmitted at a substantially constant periodic interval to the microprocessor 14 which generates a feed-forward correction signal applied to the VCM 12. Therefore it may be desirable to implement collision avoidance for other periodic control signals transmitted between the power driver 22 and microprocessor 14.
Various drawbacks have been identified by implementing a simple hold-off of other serial transmissions to prevent collisions with a control component that requires a constant periodic transmission, such as the notch filter 20 transmission or an A/D transmission. For example, A/D transmissions typically take much longer than other transmissions to complete. A hold-off scheme requires that the hold-off time be at least as long as the longest expected transmission period. However, using a hold-off equal to the maximum transmission time of the slowest transmission greatly reduces the bandwidth of the serial interface since it is not necessary to hold-off all other transmissions by that same time interval. In other words, shorter serial transmissions may be completed within the hold-off interval if allowed. The problem of reduced bandwidth is exacerbated as the number of serial transmissions between the SOC and power driver chip 22 increases, such as in disk drives employing a secondary notch filter for controlling a secondary actuator (e.g., a micro-actuator). In addition, the first and second notch filters may operate at different frequencies requiring further arbitration techniques to ensure that the outputs of both notch filters don't collide with one another or other serial transmissions. The collision avoidance algorithm must take into account the need to minimize jitter in the transmission interval of both notch filters, as well as accommodate other control components that may require a constant periodic transmission interval.
As the complexity and number of serial transmissions increases, the arbitration (collision avoidance) algorithm may be implemented in firmware executed by the microprocessor 14. However, since the control algorithm is typically executed during less than half of the sample period (wedge interval), firmware control can only send/receive data during less than half of the available time, reducing the bandwidth of the serial port even further. Additionally, the tight timing requirements for transmission control creates software that is quite difficult to debug and maintain, as the timing of the program must be carefully controlled. It is quite difficult to do this in a production environment when different branches of the code execute with varying timing. This problem is exacerbated as the amount of processing required by the microprocessor 14 increases, for example, as more sophisticated servo algorithms with multiple exception branches are employed, and particularly when changes are made to the firmware which may affect timing of the arbitration algorithm.
There is, therefore, a need to improve serial communications for a power driver chip in a disk drive by making more efficient use of serial communication bandwidth as well as processing bandwidth.